Embodiments of the inventive concept described herein relate to a data storage device including a multi-stack chip package with improved reliability.
A mass storage device such as a solid state drive (SSD) includes multi-stack chip packages, in which a plurality of semiconductor devices are stacked, to store data. In general, each multi-stack chip package may be connected to a controller through one common channel. A considerable quantity of thermal stress and mechanical stress may be applied to a semiconductor package in the process of manufacturing a multi-stack chip package by stacking semiconductor chips on a package board. Intrinsic parameters of a package, such as an internal voltage, a program voltage, and an erase voltage of a semiconductor chip, may be changed due to the stress regardless of the intent of a memory vendor. The change of the parameters may cause a serious error with respect to an operation of a data storage device. For example, a program error may occur due to generation of a program voltage that the memory vendor does not design. The program error may unfortunately need an additional program operation or cause an increase in an execution frequency of a dense code during a read operation. Accordingly, there is a need to solve issues due to a parameter change upon manufacturing of a semiconductor package in terms of product reliability and life cycle.